康智 恆：康智恆
康智恆
Electronic Circuits Lab
http://cc.ee.ntu.edu.tw
Congratulations ! 2021 VLSI-DAT 最佳論文獎蘇冠宇、康智恆“An adaptive loop gain tracking digital PLL using spectrum-balancing technique”.
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針對晶片上受金屬線延遲支配之大快取記憶體所提出之低 ...
https://ndltd.ncl.edu.tw
康智恆. 研究生(外文):, Chih-Heng Kang. 論文名稱: 針對晶片上受金屬線延遲支配之大快取記憶體所提出之低功率非一致性多區塊/通道快取記憶體架構. 論文名稱(外文):, Low ...